Overview of the RiskZero FPGA Workstation Single Board Computer
RiskZero is a "younger cousin" of the full RiskFive. The board was designed to run the single user Workstation Oberon System described in the Introduction to the Risk Project.
RiskZero is a complete workstation capable of running the real time Oberon System with its own GUI, keyboard, mouse, and a local file system. The OS can self-compile itself on the very same board. Cross development is also possible. Several PC-based emulators are available where one can develop software and download it to the board for execution.
RiskZero is open hardware. All the design files are available under the same license as the Oberon System itself. Anyone can make the RiskZero clones or modify the design for particular needs. The PDF schematics, the OrCAD schematics and layout, production gerbers, and the BOM are released on a separate page.
Note 1. The PMOD connectors are compatible with "Digilent Pmod Connectors". The license for using the Pmod connectors is available from Digilent website. Anyone can use this standard if it is mentioned that these are "Digilent Pmod Compatible".
- The list of features.
- One Spartan-6 FPGA XC6SLX9-TQ144 serving as a reconfigurable CPU.
- 4 megabytes of Zero Bus Turnaround (ZBT) memory.
- Two SD cards (one micro and one full size).
- HDMI video output.
- Two FPGA boot flash chips whose roles can be swapped with a switch.
- PS2 connectors for the keyboard and mouse.
- Three PMOD connectors for SPI-based data acquisition. See Note 1.
- USB-to-UART and USB-to-JTAG converter chip FT2232H.
- SPI-to-Ethernet converter W5500 with the on-chip TCP/IP stack.
- A socket for the 2.4 GHz Nordic Semi NRF24L01 wireless module.
- A socket for the 2.4 GHz Sparkfun WiFi WRL-13678 wireless module. NEW on Sept/26/2020!
- Two pin headers with signals for the logic analyzer.
- Current monitors to measure the power consumption while the board is running.
- New in Revision 0.1.
One 24-pin expansion header with I2C, SPI, UART, four GPIO, +3.3V, and +5V.
Parallel / serial 8-bit shift register chips serving a DIP switch and LEDs.
It is notable that the FPGA is the only major logic on this board. (Well, almost. Wiznet W5500 is used to offload the mundane TCP/IP processing away from the FPGA.) There is not even a trace of the conventional CPU other than the FPGA itself. The entire operating system is executed by the FPGA.
Applications: Reconfigurable is the keyword of the FPGA-based designs. The central FPGA can implement the so-called soft CPU's of varying levels of complexity, from a very simple 8-bit microcontroller, all the way up to a 32-bit CPU with floating point operations implemented in firmware. This board can be thus configured for a variety of applications, either simple or very complex. Running the real time OS with a graphical user interface, file storage, a compiler, and a run time system is just an example of what the FPGA-based hardware can do.
- The design files were sent for quote on May/25/2020.
- We received the quote on May/28/2020.
- The quote is shown on the Design page.
- The cost of manufacturing the new revision 0.1 dated Sept/26/2020 will be within a few dollars the same as the May quote.
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